The invention relates to a feedback network (60) for cascade amplifiers (200), which comprises an active stage (30) to feed signal back to a first internal node (65) at the output of the first amplifier stage (61) of the cascade. The invention further relates to a feedback network (60) which comprises said active feedback stage (30) with said first internal amplifier node (65) connection and a feedback resistor (10) connected from said cascade amplifier output port (out) to its input port (in).
The present invention relates to amplifiers in general, and to wideband feedback amplifiers operating at gigahertz frequencies in particular. The invention also relates to production of a broadband low-noise amplifier, that can be mass-produced at a negligible cost. This is a potentially important application for the invention, which is made more relevant by current interest in ultrawideband (UWB) communications for high bitrate consumer applications. Other possible applications include, but are not limited to, transimpedance amplifiers intended for optical communication systems. Thus, for economical reasons a bulk CMOS process mainly intended for integration of digital circuitry should be used for the purpose. Sufficient bandwidth with little gain variation could be guaranteed with three alternative techniques: 1) distributed amplification, 2) use of a complex filtering network at 10 circuit input/output, or 3) feedback amplification. First choice is generally limited by its higher power dissipation and possibly intensive design effort, whereas the second choice includes an increased IC area, high design effort and resistive losses from parasitics. These considerations therefore suggest use of the third alternative, where a passive feedback network is used to swap amplifier gain for a wideband frequency response. Advantageously, this stabilizes gain and port impedances as well, and this 15 well-known technology is compatible with low-cost integration in complementary metal-oxide semiconductor (CMOS) processes.
However, the amount of applicable feedback is limited by stability considerations, and this has traditionally been dealt with by using different compensation networks which aim at increasing the amount of available stable feedback. Conventional microwave feedback designs use complex compensating capacitor networks for the purpose, but this approach is area-consuming, sensitive to parasitics, and timeconsuming to design. An example of a very complex feedback network is seen in FIG. 1 which duplicates the single-stage UWB low-noise amplifier (LNA) design reported in J.-H. C. Zhan and S. S. Taylor, “A 5 GHz resistive-feedback CMOS LNA for low-cost multi-standard applications,” in Solid-State Circuits, 2006 IEEE International Conference Digest of Technical Papers, 2006, pp. 721-722, 730. 25 However, according to simulations this prior art work is impossible to reproduce with sufficient performance when using a modern nanometer level digital CMOS process with a standard low supply voltage, as its use of stacked transistors limits the available dynamic range (DR), and its complex feedback network requires an involved design effort. Fundamentally limiting is the low intrinsic gain of digital transistors, which decreases a single stage gain to an unacceptably low level.
A possible alternative which uses three cascaded gain stages is shown in FIG. 2 as reported in J. Janssens, M. Steyaert, and H. Miyakawa, “A 2.7 Volt CMOS broadband low noise amplifier,” in VLSI Circuits, 1997. Digest of Technical Papers., 1997 Symposium on, 1997, pp. 87-88, where the main idea is to improve isolation of the circuit by driving a resistive feedback network with a gain stage. The circuit in FIG. 2 is in fact a variation of a well-known bipolar amplifier connection where an emitter-follower is used to drive the feedback resistors connected to the input port. However, although the depicted connection is simple on the surface, its use for e.g. UWB applications is problematic as the feedback amplifier gain roll-off introduces difficult high frequency poles to the feedback circuit. As a testimony to this the original circuit shown in FIG. 2 uses two additional impedance networks to compensate for parasitic effects: first inductor 032 and its dc-block 034 are used to null parasitics, second, the resistor-capacitor (RC) network 031, 033 has to be used to ensure stability.